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Ohio Fabrication Advanced Litho Install Engineer

Hillsboro, אורגון; פניקס, אריזונה Job ID JR0249771 Job Category Manufacturing and Process Development Work Mode On-site Required Experience Level Experienced

Job Description

The Cardinal Program (Intel Manufacturing in Ohio) within the Lithography Department is looking for an Advanced Lithography (AL) install engineer. The AL install engineer is responsible for supporting and enabling the successful insertion of the latest generation EUV ASML scanners which may include the latest generation HiNA EUV scanners. The install engineer is responsible for all aspects of tool install including safety, people, quality, cost, and schedule. The install engineer will collaborate with the litho AC(s), module experts, ASML/Trumpf/Edwards install teams, technology development, Fab Construction Enterprise (FCE), overhead crane install and service teams, Automated Material Handling Systems teams (AMHS) and all tool install stakeholders. This role encompasses owning equipment that spans the utility, subfab, and fab levels as well as interacting with a crane system and reticle delivery system that is above the tools. A typical day may include activities across all of these levels with frequent trips up and down stairs and ladders. This position requires a 2-3 year relocation assignment in Oregon, joining the LTD organization as a SEED. Final placement will be in the Cardinal program in Ohio, but the travel and assignment to Oregon is required.

Responsibilities include, but are not limited to:

  • Developing and executing a schedule from design through MRCL on the AL EUV scanners and accountable to meeting all milestones.
  • Tactically participates and directs PreFac, dock, and install activities on a daily basis to ensure the project hits all the necessary milestones.
  • Is a technical leader on the tool set and can perform advanced model-based problem solving.
  • Interface with all relevant parties to ensure the install activities meet the program schedule.
  • Forecast and Test Wafer management.
  • Responsible for EDB content accuracy; tracks any adds /deletes due to changes in LRP or equipment requirements.
  • Forecasts tool specific resource management needs.
  • Participates in VF IQ forums.
  • Participates in supplier incident investigations.
  • Supports construction incident investigations as required.
  • Coaches supplier protocol and housekeeping.
  • Coaches supplier work plan review.
  • Participates in FA Master and LSP accuracy and execution to schedule.
  • Participates in design reviews.
  • Participates in and communicates any corrections to the Master TID (Tool Install Design).
  • Supporting TD as needed while they work to finalize AL EUV scanner install development.
  • Ensuring TD AL EUV scanner IQ knowledge is documented for transfer to Ohio (areas of focus: building readiness, system design, pre-install, install and mechanical assembly, safety signoff, and milestone timing integration)

The ideal candidate should have a subset of the following traits:

  • Excellent listening, written and verbal communication, deal with ambiguity in defining activities and direction, and commitment to task.
  • High motivation with a strong work ethic.
  • Previous install and qual experience with litho equipment.
  • Scanner platforms are preferred but not a must.
  • Technical expertise on photolithography scanner platforms and be able to provide technical direction on Lithography quality issues.
  • Familiarity with lithography clean track equipment and function.
  • Familiarity with lithography chemicals - resist and anti-reflective coatings.
  • Familiarity with troubleshooting inline integrated defect sources and developing root cause solutions at the tool level.
  • Familiarity in system development to help model reticle changes and monitor reticle health.
  • Working in a high performing team culture which includes setting high expectations, driving accountability to those expectations with a high sense of urgency, role modeling the desired culture, possess excellent teamwork and leadership skills, demonstrated problem solving and prioritization skills, and driving high performance goals for the group.
  • Use data to influence factory and virtual factory direction.
  • Work independently and manage stakeholders.
  • Articulating data and projects to senior management.
  • Strong analytical mind with problem solving skills.
  • Build interactions with internal Intel support groups and internal functional areas to support and drive an aligned Lithography business result.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Minimum requirements:

  • Candidate must possess at a minimum a Bachelor of Science degree in a related science or engineering field with 9 years of process engineering experience in semiconductor wafer fabrication.
  • 7+ years of install experience in a semiconductor wafer fabrication environment:
    • Semiconductor equipment knowledge and troubleshooting skills.
    • Interacting with vendor field service engineering support and manufacturing/engineering technicians on toolsets.
    • Providing technical direction on quality issues.
    • Advanced data analysis.

Preferred Qualifications:

  • Previous install and qual experience with EUV or DUV scanners.
  • Successfully completed a SEED assignment in LTD as part of a technology transfer.
  • Technical expertise within semiconductor Processing Engineering and be able to provide technical direction on lithography quality issues and lithography matching performance.
  • Understanding of lithography manufacturing process steps and understand interactions with incoming and outgoing process modules.
  • Knowledge of EUV or immersion lithography processes and equipment configurations.
  • Equipment knowledge on TEL ProV and ProZ Lithius platforms.
  • Understanding of Reticle print risks and understand interactions with lithography patterning equipment such as EUV and environmental and processing impacts.
  • Knowledge of immersion lithography processes and EUV processing and reticle interactions.
  • Experience in leading senior, cross function/cross organization teams
  • Experience in Data analysis (JMP, SPC, MATLAB, Mathematica) and Design of Experiment (DOE) principles
  • Experience with Autodesk and BIM360 software

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Phoenix

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.


We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Working Model

This role will require an on-site presence.

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