Power Management Micro-Architect

Job Description

Come and be a part of the team creating SoC and chip-set designs and products for Intel Client and Auto Business. This position is a role within the ISCP's SOC Front-End Design team, building SoC products for client and automotive markets.

We are seeking a highly skilled micro-architect with proven expertise and experience in low power management at SoC level. This individual will be responsible for ensuring the successful integration of Power-Management related IPs. Success in this role is both proactive and meeting execution milestones - proactive in working with the IP architects and micro-architects on new features meeting SoC needs; thorough reviews and deep-dives to prove successful integration of PM-related IPs in our SoCs.
As a Micro-Architect, a typical day may include, but is not limited to:

• Becoming an expert and owning the development of a specific area of our SoC infrastructure (IP interconnect Fabrics, Clocks and Resets, Power Management, Boot and Reset Flows, GPIO's, etc.) - in this case, PM
• Leading SoC-level features and strategic initiatives
• Developing micro-architecture for SoC-owned logic blocks
• Building a strong technical understanding of specific IP's and developing expertise in how those IP's fit into SoC and platform level flows
• Providing day-to-day technical guidance and mentoring for SoC integration and validation teams
• Collaborating with pre- and post-silicon validation teams on validation strategies, test plans, coverage matrices, debug, quality reviews, etc.

We are:
- Open to new ideas and methodologies
- A collaborative team demonstrating the best teamwork across Intel
- Here to help you succeed
- People who want to do innovative things

In addition to the qualifications listed below the ideal candidate will demonstrate the following traits:

• An excellent communicator
• Extremely organized
• A team player who loves to collaborate
• A technical leader who communicates well with great influencing skills
• Someone who meets their commitments
• Motivated
• Self-driven
• Someone who wants to make a difference through technology

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• You must possess a Bachelors in Electrical/Computer Engineering or related field and 17+ years of experience; OR a Masters degree in Electrical/Computer Engineering or related field and 15+ years of experience; OR a PhD in Electrical/Computer Engineering or related field.

• 10+ years of experience in the following:

  oPower Management flows

  oDesigning or validating SoC's, CPU's, or IP blocks experience

  oHardware Description Languages such as (System Verilog, Verilog, or VHDL) and Static Timing Analysis.

  oDesign Quality checks and methodologies experience such as (Clock Domain Crossing (CDC), Lint, etc.).

Preferred Qualifications:

• IP integration and/or SoC-level flows experience, including clocking, boot/reset entry, power management, Design for Test, Design for Debug, Security, IP interconnect fabrics, High speed IO integration, etc.
• Experience in Chipset products or IP's integrated into Chipset experience is a plus.
• Experience with both pre-silicon and post-silicon product development stages

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

Inside this Business Group

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Other Locations

US, OR, Hillsboro; US, AZ, Phoenix; US, CA, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.



Annual Salary Range for jobs which could be performed in the US $186,070.00-$262,680.00
*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.